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contributor authorPanigrahy, Asisa Kumar
contributor authorChen, Kuan-Neng
date accessioned2019-02-28T11:14:19Z
date available2019-02-28T11:14:19Z
date copyright3/2/2018 12:00:00 AM
date issued2018
identifier issn1043-7398
identifier otherep_140_01_010801.pdf
identifier urihttp://yetl.yabesh.ir/yetl1/handle/yetl/4254169
description abstractArguably, the integrated circuit (IC) industry has received robust scientific and technological attention due to the ultra-small and extremely fast transistors since past four decades that consents to Moore's law. The introduction of new interconnect materials as well as innovative architectures has aided for large-scale miniaturization of devices, but their contributions were limited. Thus, the focus has shifted toward the development of new integration approaches that reduce the interconnect delays which has been achieved successfully by three-dimensional integrated circuit (3D IC). At this juncture, semiconductor industries utilize Cu–Cu bonding as a key technique for 3D IC integration. This review paper focuses on the key role of low temperature Cu–Cu bonding, renaissance of the low temperature bonding, and current research trends to achieve low temperature Cu–Cu bonding for 3D IC and heterogeneous integration applications.
publisherThe American Society of Mechanical Engineers (ASME)
titleLow Temperature Cu–Cu Bonding Technology in Three-Dimensional Integration: An Extensive Review
typeJournal Paper
journal volume140
journal issue1
journal titleJournal of Electronic Packaging
identifier doi10.1115/1.4038392
journal fristpage10801
journal lastpage010801-11
treeJournal of Electronic Packaging:;2018:;volume( 140 ):;issue: 001
contenttypeFulltext


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