Review on Percolating and Neck-Based Underfills for Three-Dimensional Chip StacksSource: Journal of Electronic Packaging:;2016:;volume( 138 ):;issue: 004::page 41009Author:Brunschwiler, Thomas
,
Zürcher, Jonas
,
Del Carro, Luca
,
Schlottig, Gerd
,
Burg, Brian
,
Zimmermann, Severin
,
Zschenderlein, Uwe
,
Wunderle, Bernhard
,
Schindler-Saefkow, Florian
,
Stässle, Rahel
DOI: 10.1115/1.4034927Publisher: The American Society of Mechanical Engineers (ASME)
Abstract: Heat dissipation from three-dimensional (3D) chip stacks can cause large thermal gradients due to the accumulation of dissipated heat and thermal interfaces from each integrated die. To reduce the overall thermal resistance and thereby the thermal gradients, this publication will provide an overview of several studies on the formation of sequential thermal underfills that result in percolation and quasi-areal thermal contacts between the filler particles in the composite material. The quasi-areal contacts are formed from nanoparticles self-assembled by capillary bridging, so-called necks. Thermal conductivities of up to 2.5 W/m K and 2.8 W/m K were demonstrated experimentally for the percolating and the neck-based underfills, respectively. This is a substantial improvement with respect to a state-of-the-art capillary thermal underfill (0.7 W/m K). Critical parameters in the formation of sequential thermal underfills will be discussed, such as the material choice and refinement, as well as the characteristics and limitations of the individual process steps. Guidelines are provided on dry versus wet filling of filler particles, the optimal bimodal nanosuspension formulation and matrix material feed, and the over-pressure cure to mitigate voids in the underfill during backfilling. Finally, the sequential filling process is successfully applied on microprocessor demonstrator modules, without any detectable sign of degradation after 1500 thermal cycles, as well as to a two-die chip stack. The morphology and performance of the novel underfills are further discussed, ranging from particle arrangements in the filler particle bed, to cracks formed in the necks. The thermal and mechanical performance is benchmarked with respect to the capillary thermal and mechanical underfills. Finally, the thermal improvements within a chip stack are discussed. An 8 - or 16-die chip stack can dissipate 46% and 65% more power with the optimized neck-based thermal underfill than with a state-of-the-artcapillary thermal underfill.
|
Collections
Show full item record
contributor author | Brunschwiler, Thomas | |
contributor author | Zürcher, Jonas | |
contributor author | Del Carro, Luca | |
contributor author | Schlottig, Gerd | |
contributor author | Burg, Brian | |
contributor author | Zimmermann, Severin | |
contributor author | Zschenderlein, Uwe | |
contributor author | Wunderle, Bernhard | |
contributor author | Schindler-Saefkow, Florian | |
contributor author | Stässle, Rahel | |
date accessioned | 2017-11-25T07:21:01Z | |
date available | 2017-11-25T07:21:01Z | |
date copyright | 2016/10/21 | |
date issued | 2016 | |
identifier issn | 1043-7398 | |
identifier other | ep_138_04_041009.pdf | |
identifier uri | http://138.201.223.254:8080/yetl1/handle/yetl/4236828 | |
description abstract | Heat dissipation from three-dimensional (3D) chip stacks can cause large thermal gradients due to the accumulation of dissipated heat and thermal interfaces from each integrated die. To reduce the overall thermal resistance and thereby the thermal gradients, this publication will provide an overview of several studies on the formation of sequential thermal underfills that result in percolation and quasi-areal thermal contacts between the filler particles in the composite material. The quasi-areal contacts are formed from nanoparticles self-assembled by capillary bridging, so-called necks. Thermal conductivities of up to 2.5 W/m K and 2.8 W/m K were demonstrated experimentally for the percolating and the neck-based underfills, respectively. This is a substantial improvement with respect to a state-of-the-art capillary thermal underfill (0.7 W/m K). Critical parameters in the formation of sequential thermal underfills will be discussed, such as the material choice and refinement, as well as the characteristics and limitations of the individual process steps. Guidelines are provided on dry versus wet filling of filler particles, the optimal bimodal nanosuspension formulation and matrix material feed, and the over-pressure cure to mitigate voids in the underfill during backfilling. Finally, the sequential filling process is successfully applied on microprocessor demonstrator modules, without any detectable sign of degradation after 1500 thermal cycles, as well as to a two-die chip stack. The morphology and performance of the novel underfills are further discussed, ranging from particle arrangements in the filler particle bed, to cracks formed in the necks. The thermal and mechanical performance is benchmarked with respect to the capillary thermal and mechanical underfills. Finally, the thermal improvements within a chip stack are discussed. An 8 - or 16-die chip stack can dissipate 46% and 65% more power with the optimized neck-based thermal underfill than with a state-of-the-artcapillary thermal underfill. | |
publisher | The American Society of Mechanical Engineers (ASME) | |
title | Review on Percolating and Neck-Based Underfills for Three-Dimensional Chip Stacks | |
type | Journal Paper | |
journal volume | 138 | |
journal issue | 4 | |
journal title | Journal of Electronic Packaging | |
identifier doi | 10.1115/1.4034927 | |
journal fristpage | 41009 | |
journal lastpage | 041009-10 | |
tree | Journal of Electronic Packaging:;2016:;volume( 138 ):;issue: 004 | |
contenttype | Fulltext |