contributor author | Okereke, Raphael | |
contributor author | Kacker, Karan | |
contributor author | Sitaraman, Suresh K. | |
date accessioned | 2017-05-09T00:57:43Z | |
date available | 2017-05-09T00:57:43Z | |
date issued | 2013 | |
identifier issn | 1528-9044 | |
identifier other | ep_135_03_031004.pdf | |
identifier uri | http://yetl.yabesh.ir/yetl/handle/yetl/151435 | |
description abstract | This paper presents a study on a dualpath compliant interconnect design which attempts to improve the balance between mechanical compliance and electrical parasitics by using multiple electrical paths in place of a single electrical path. The high compliance of the parallelpath compliant interconnect structure will ensure the reliability of lowK dies. Implementation of this interconnect technology can be cost effective by using a waferlevel process and by eliminating the underfill process. Although an underfill is not required for thermomechanical reliability purposes, an underfill may be used for reducing contamination and oxidation of the interconnects and also to provide additional rigidity against mechanical loads. Therefore, this paper also examines the role of an underfill on the thermomechanical reliability of a dualpath compliant interconnect. | |
publisher | The American Society of Mechanical Engineers (ASME) | |
title | Investigation of Dual Electrical Paths for Off Chip Compliant Interconnects | |
type | Journal Paper | |
journal volume | 135 | |
journal issue | 3 | |
journal title | Journal of Electronic Packaging | |
identifier doi | 10.1115/1.4024112 | |
journal fristpage | 31004 | |
journal lastpage | 31004 | |
identifier eissn | 1043-7398 | |
tree | Journal of Electronic Packaging:;2013:;volume( 135 ):;issue: 003 | |
contenttype | Fulltext | |