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    Investigation of Dual Electrical Paths for Off Chip Compliant Interconnects

    Source: Journal of Electronic Packaging:;2013:;volume( 135 ):;issue: 003::page 31004
    Author:
    Okereke, Raphael
    ,
    Kacker, Karan
    ,
    Sitaraman, Suresh K.
    DOI: 10.1115/1.4024112
    Publisher: The American Society of Mechanical Engineers (ASME)
    Abstract: This paper presents a study on a dualpath compliant interconnect design which attempts to improve the balance between mechanical compliance and electrical parasitics by using multiple electrical paths in place of a single electrical path. The high compliance of the parallelpath compliant interconnect structure will ensure the reliability of lowK dies. Implementation of this interconnect technology can be cost effective by using a waferlevel process and by eliminating the underfill process. Although an underfill is not required for thermomechanical reliability purposes, an underfill may be used for reducing contamination and oxidation of the interconnects and also to provide additional rigidity against mechanical loads. Therefore, this paper also examines the role of an underfill on the thermomechanical reliability of a dualpath compliant interconnect.
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      Investigation of Dual Electrical Paths for Off Chip Compliant Interconnects

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    http://yetl.yabesh.ir/yetl1/handle/yetl/151435
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    contributor authorOkereke, Raphael
    contributor authorKacker, Karan
    contributor authorSitaraman, Suresh K.
    date accessioned2017-05-09T00:57:43Z
    date available2017-05-09T00:57:43Z
    date issued2013
    identifier issn1528-9044
    identifier otherep_135_03_031004.pdf
    identifier urihttp://yetl.yabesh.ir/yetl/handle/yetl/151435
    description abstractThis paper presents a study on a dualpath compliant interconnect design which attempts to improve the balance between mechanical compliance and electrical parasitics by using multiple electrical paths in place of a single electrical path. The high compliance of the parallelpath compliant interconnect structure will ensure the reliability of lowK dies. Implementation of this interconnect technology can be cost effective by using a waferlevel process and by eliminating the underfill process. Although an underfill is not required for thermomechanical reliability purposes, an underfill may be used for reducing contamination and oxidation of the interconnects and also to provide additional rigidity against mechanical loads. Therefore, this paper also examines the role of an underfill on the thermomechanical reliability of a dualpath compliant interconnect.
    publisherThe American Society of Mechanical Engineers (ASME)
    titleInvestigation of Dual Electrical Paths for Off Chip Compliant Interconnects
    typeJournal Paper
    journal volume135
    journal issue3
    journal titleJournal of Electronic Packaging
    identifier doi10.1115/1.4024112
    journal fristpage31004
    journal lastpage31004
    identifier eissn1043-7398
    treeJournal of Electronic Packaging:;2013:;volume( 135 ):;issue: 003
    contenttypeFulltext
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    DSpace software copyright © 2002-2015  DuraSpace
    نرم افزار کتابخانه دیجیتال "دی اسپیس" فارسی شده توسط یابش برای کتابخانه های ایرانی | تماس با یابش
    yabeshDSpacePersian