| contributor author | R. T. P. Lee | |
| contributor author | A. S. Zuruzi | |
| contributor author | S. K. Lahiri | |
| date accessioned | 2017-05-09T00:09:51Z | |
| date available | 2017-05-09T00:09:51Z | |
| date copyright | December, 2003 | |
| date issued | 2003 | |
| identifier issn | 1528-9044 | |
| identifier other | JEPAE4-26225#597_1.pdf | |
| identifier uri | http://yetl.yabesh.ir/yetl/handle/yetl/128184 | |
| description abstract | The results of this study demonstrate the viability of a low cost maskless process for the fabrication of ultra-fine pitch solder bumps. The fabricated solder bump arrays have a pitch and diameter of 120 and 70 μm, respectively. Widely used eutectic 63Sn37Pb and lead-free 95.5Sn3.8Ag0.7Cu solders were used to form the bumps. No solder bridging was observed between adjacent bumps, and the solder bumps exhibited good dimensional uniformity. The solder bump to aluminum (Al) pad bond integrity was found to be excellent, as evidenced by the high stress to failure. The failure mode is predominately Al pad lift-off indicating a robust solder bump-pad joint. | |
| publisher | The American Society of Mechanical Engineers (ASME) | |
| title | Maskless Process for Fabrication of Ultra-Fine Pitch Solder Bumps for Flip Chip Interconnects | |
| type | Journal Paper | |
| journal volume | 125 | |
| journal issue | 4 | |
| journal title | Journal of Electronic Packaging | |
| identifier doi | 10.1115/1.1604806 | |
| journal fristpage | 597 | |
| journal lastpage | 601 | |
| identifier eissn | 1043-7398 | |
| keywords | Solders | |
| keywords | Manufacturing | |
| keywords | Flip-chip AND Failure | |
| tree | Journal of Electronic Packaging:;2003:;volume( 125 ):;issue: 004 | |
| contenttype | Fulltext | |