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    Solder Joint Reliability of Wafer Level Chip Scale Packages (WLCSP): A Time-Temperature-Dependent Creep Analysis

    Source: Journal of Electronic Packaging:;2000:;volume( 122 ):;issue: 004::page 311
    Author:
    John H. Lau
    ,
    ASME Fellow
    ,
    S.-W. Ricky Lee
    ,
    Chris Chang
    DOI: 10.1115/1.1289769
    Publisher: The American Society of Mechanical Engineers (ASME)
    Abstract: A novel and reliable wafer level chip scale package (WLCSP) is investigated in this paper. It consists of a copper conductor layer and two low cost dielectric layers. The bump geometry consists of the eutectic solder, the copper core, and the under bump metallurgy. Nonlinear time-temperature-dependent finite element analyses are performed to determine the shear stress, shear creep strain, shear stress and shear creep strain hysteresis loops, and creep strain energy density of the corner solder joint. The thermal-fatigue life of the corner solder joint is then predicted by the averaged creep strain energy density range per cycle and a linear fatigue crack growth rate theory. The WLCSP solder bumps are also subjected to shear test. Finally, the WLCSP solder joints are subjected to both mechanical shear and thermal cycling tests. [S1043-7398(00)01004-5]
    keyword(s): Temperature , Solders , Semiconductor wafers , Shear (Mechanics) , Creep , Solder joints , Corners (Structural elements) , Fatigue , Manufacturing , Finite element analysis , Cycles AND Reliability ,
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      Solder Joint Reliability of Wafer Level Chip Scale Packages (WLCSP): A Time-Temperature-Dependent Creep Analysis

    URI
    http://yetl.yabesh.ir/yetl1/handle/yetl/123522
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    • Journal of Electronic Packaging

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    contributor authorJohn H. Lau
    contributor authorASME Fellow
    contributor authorS.-W. Ricky Lee
    contributor authorChris Chang
    date accessioned2017-05-09T00:02:10Z
    date available2017-05-09T00:02:10Z
    date copyrightDecember, 2000
    date issued2000
    identifier issn1528-9044
    identifier otherJEPAE4-26186#311_1.pdf
    identifier urihttp://yetl.yabesh.ir/yetl/handle/yetl/123522
    description abstractA novel and reliable wafer level chip scale package (WLCSP) is investigated in this paper. It consists of a copper conductor layer and two low cost dielectric layers. The bump geometry consists of the eutectic solder, the copper core, and the under bump metallurgy. Nonlinear time-temperature-dependent finite element analyses are performed to determine the shear stress, shear creep strain, shear stress and shear creep strain hysteresis loops, and creep strain energy density of the corner solder joint. The thermal-fatigue life of the corner solder joint is then predicted by the averaged creep strain energy density range per cycle and a linear fatigue crack growth rate theory. The WLCSP solder bumps are also subjected to shear test. Finally, the WLCSP solder joints are subjected to both mechanical shear and thermal cycling tests. [S1043-7398(00)01004-5]
    publisherThe American Society of Mechanical Engineers (ASME)
    titleSolder Joint Reliability of Wafer Level Chip Scale Packages (WLCSP): A Time-Temperature-Dependent Creep Analysis
    typeJournal Paper
    journal volume122
    journal issue4
    journal titleJournal of Electronic Packaging
    identifier doi10.1115/1.1289769
    journal fristpage311
    journal lastpage316
    identifier eissn1043-7398
    keywordsTemperature
    keywordsSolders
    keywordsSemiconductor wafers
    keywordsShear (Mechanics)
    keywordsCreep
    keywordsSolder joints
    keywordsCorners (Structural elements)
    keywordsFatigue
    keywordsManufacturing
    keywordsFinite element analysis
    keywordsCycles AND Reliability
    treeJournal of Electronic Packaging:;2000:;volume( 122 ):;issue: 004
    contenttypeFulltext
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    DSpace software copyright © 2002-2015  DuraSpace
    نرم افزار کتابخانه دیجیتال "دی اسپیس" فارسی شده توسط یابش برای کتابخانه های ایرانی | تماس با یابش
    yabeshDSpacePersian