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contributor authorR. K. Govila
contributor authorE. Jih
contributor authorY.-H. Pao
contributor authorC. Larner
date accessioned2017-05-08T23:43:56Z
date available2017-05-08T23:43:56Z
date copyrightJune, 1994
date issued1994
identifier issn1528-9044
identifier otherJEPAE4-26142#83_1.pdf
identifier urihttp://yetl.yabesh.ir/yetl/handle/yetl/113439
description abstractLeadless chip resistors (LCR) made by two different manufacturers and surface mounted on glass/epoxy printed circuit board (PCB) were subjected to thermal cycling between −55°C to 125°C in order to induce thermal fatigue failure/damage. The test units were subjected to a maximum of 250 thermal cycles. Solder joints in both types of LCRs were examined in scanning electron microscope and a relative comparison of the extent of fatigue damage is presented. The failure mechanism is associated with cracking in the eutectic compostion Sn/Pb solder initiated at the stress concentration sites. A nonlinear, time-dependent finite element modeling analysis has been performed to determine critical stress concentration sites in the solder joint. Key parameters leading to the initiation of solder damage are identified, and recommendations are made to improve the design in terms of solder configuration such as the radius of corner of the alumina substrate and the standoff height.
publisherThe American Society of Mechanical Engineers (ASME)
titleThermal Fatigue Damage in the Solder Joints of Leadless Chip Resistors
typeJournal Paper
journal volume116
journal issue2
journal titleJournal of Electronic Packaging
identifier doi10.1115/1.2905509
journal fristpage83
journal lastpage88
identifier eissn1043-7398
keywordsResistors
keywordsSolder joints
keywordsFatigue damage
keywordsSolders
keywordsStress concentration
keywordsCorners (Structural elements)
keywordsDesign
keywordsFailure mechanisms
keywordsFinite element analysis
keywordsFracture (Process)
keywordsCycles
keywordsEpoxy adhesives
keywordsGlass
keywordsScanning electron microscopes
keywordsModeling analysis
keywordsPrinted circuit boards AND Fatigue failure
treeJournal of Electronic Packaging:;1994:;volume( 116 ):;issue: 002
contenttypeFulltext


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