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    A Numerical Study of Fatigue Life of J-Leaded Solder Joints Using the Energy Partitioning Approach

    Source: Journal of Electronic Packaging:;1993:;volume( 115 ):;issue: 004::page 416
    Author:
    S. Verma
    ,
    A. Dasgupta
    ,
    D. Barker
    DOI: 10.1115/1.2909351
    Publisher: The American Society of Mechanical Engineers (ASME)
    Abstract: A surface-mount J-leaded device is modeled in this study, to investigate the effects of selected design, loading and manufacturing variables on solder joint fatigue life. The solder is modeled as a viscoplastic material, while the remaining materials are assumed to be linear elastic, as a first order approximation. Finite element analysis is used to determine the stress and strain history in the solder, due to temperature cycling. A “typical” temperature cycle with uniform dwell periods is applied to the solder joint. The computed stress and strain histories are utilized to construct hysteresis plots at each location in the solder joint. The hysteresis plots are then partitioned into elastic strain energy, plastic work and creep work dissipation. The fatigue life of the solder joint is then estimated through the energy partitioning technique. Parametric studies are conducted to investigate qualitatively the dependence of solder joint fatigue life on selected material properties, geometric variables, life cycle as well as accelerated loads, and manufacturing variabilities.
    keyword(s): Fatigue life , Solder joints , Stress , Temperature , Solders , Manufacturing , Cycles , Creep , Energy dissipation , Materials properties , Design , Finite element analysis , Approximation AND Surface mount packaging ,
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      A Numerical Study of Fatigue Life of J-Leaded Solder Joints Using the Energy Partitioning Approach

    URI
    http://yetl.yabesh.ir/yetl1/handle/yetl/111741
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    contributor authorS. Verma
    contributor authorA. Dasgupta
    contributor authorD. Barker
    date accessioned2017-05-08T23:40:58Z
    date available2017-05-08T23:40:58Z
    date copyrightDecember, 1993
    date issued1993
    identifier issn1528-9044
    identifier otherJEPAE4-26140#416_1.pdf
    identifier urihttp://yetl.yabesh.ir/yetl/handle/yetl/111741
    description abstractA surface-mount J-leaded device is modeled in this study, to investigate the effects of selected design, loading and manufacturing variables on solder joint fatigue life. The solder is modeled as a viscoplastic material, while the remaining materials are assumed to be linear elastic, as a first order approximation. Finite element analysis is used to determine the stress and strain history in the solder, due to temperature cycling. A “typical” temperature cycle with uniform dwell periods is applied to the solder joint. The computed stress and strain histories are utilized to construct hysteresis plots at each location in the solder joint. The hysteresis plots are then partitioned into elastic strain energy, plastic work and creep work dissipation. The fatigue life of the solder joint is then estimated through the energy partitioning technique. Parametric studies are conducted to investigate qualitatively the dependence of solder joint fatigue life on selected material properties, geometric variables, life cycle as well as accelerated loads, and manufacturing variabilities.
    publisherThe American Society of Mechanical Engineers (ASME)
    titleA Numerical Study of Fatigue Life of J-Leaded Solder Joints Using the Energy Partitioning Approach
    typeJournal Paper
    journal volume115
    journal issue4
    journal titleJournal of Electronic Packaging
    identifier doi10.1115/1.2909351
    journal fristpage416
    journal lastpage423
    identifier eissn1043-7398
    keywordsFatigue life
    keywordsSolder joints
    keywordsStress
    keywordsTemperature
    keywordsSolders
    keywordsManufacturing
    keywordsCycles
    keywordsCreep
    keywordsEnergy dissipation
    keywordsMaterials properties
    keywordsDesign
    keywordsFinite element analysis
    keywordsApproximation AND Surface mount packaging
    treeJournal of Electronic Packaging:;1993:;volume( 115 ):;issue: 004
    contenttypeFulltext
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