contributor author | Yeun Tsun Wong | |
contributor author | Michael Pecht | |
date accessioned | 2017-05-08T23:29:44Z | |
date available | 2017-05-08T23:29:44Z | |
date copyright | September, 1989 | |
date issued | 1989 | |
identifier issn | 1528-9044 | |
identifier other | JEPAE4-26110#228_1.pdf | |
identifier uri | http://yetl.yabesh.ir/yetl/handle/yetl/105247 | |
description abstract | By simulating the movement of a node in a tree, an iso-distance error graph (IDEG) which contains connection errors generated by replacing a Steiner tree with its equivalent non-Steiner tree is developed. The IDEG is used to estimate how well various types of non-Steiner trees function as a Steiner tree in the placement of components on a printed wiring board (PWB). To reduce connection errors in the IDEG and pursue computational efficiency, a row-based tree family in which the tree length is primarily dependent on the terminal coordinates of each row, is constructed. Then, based on the analysis of the error distribution on the IDEG, the row-based trees and the spanning tree are compared in terms of their approximation to the Steiner tree. | |
publisher | The American Society of Mechanical Engineers (ASME) | |
title | Approximating the Steiner Tree in the Placement Process | |
type | Journal Paper | |
journal volume | 111 | |
journal issue | 3 | |
journal title | Journal of Electronic Packaging | |
identifier doi | 10.1115/1.3226538 | |
journal fristpage | 228 | |
journal lastpage | 235 | |
identifier eissn | 1043-7398 | |
keywords | Tree (Data structure) | |
keywords | Errors | |
keywords | Printed circuit boards AND Approximation | |
tree | Journal of Electronic Packaging:;1989:;volume( 111 ):;issue: 003 | |
contenttype | Fulltext | |