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contributor authorRen, Pan
contributor authorWang, Chulin
contributor authorLiang, Yaya
contributor authorZhao, Xuan
contributor authorLi, Xiaojie
contributor authorPingan, Du
date accessioned2025-04-21T10:12:46Z
date available2025-04-21T10:12:46Z
date copyright12/20/2024 12:00:00 AM
date issued2024
identifier issn1043-7398
identifier otherep_147_02_021004.pdf
identifier urihttp://yetl.yabesh.ir/yetl1/handle/yetl/4305719
description abstractThere are numbers of through ceramic vias (TCVs) in ceramic package substrates for vertical interconnection of signal, and it would be very difficult, even impossible, to create the full-wave three-dimensional (3D) model of all TCVs during signal integrity (SI) analysis of a chip package. Thus, this paper presents a π-type equivalent circuit model for a signal TCV in steady of the full-wave 3D model. To improve model accuracy, the model takes into account the parasitic inductance and resistance induced by the skin effect of TCV at high frequencies, as well as the parallel plate effect between multilayer ground planes. A more accurate calculation method of via-plate capacitance is proposed based on the quasi-static method. According to the feature selective verification (FSV) method, the TCV S parameters calculated by the equivalent model and using the via-plate capacitance calculation method proposed in this study are in good consistency with those from high-frequency structure simulator (HFSS) full-wave 3D model in a wideband, and the solution time is reduced by 98.85%.
publisherThe American Society of Mechanical Engineers (ASME)
titleWideband Equivalent Circuit Modeling and Parameter Extraction Method for Through Via in Ceramic Package Substrate
typeJournal Paper
journal volume147
journal issue2
journal titleJournal of Electronic Packaging
identifier doi10.1115/1.4067269
journal fristpage21004-1
journal lastpage21004-8
page8
treeJournal of Electronic Packaging:;2024:;volume( 147 ):;issue: 002
contenttypeFulltext


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