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contributor authorLall, Pradeep
contributor authorNarangaparambil, Jinesh
contributor authorSoni, Ved
contributor authorMiller, Scott
date accessioned2022-05-08T09:06:18Z
date available2022-05-08T09:06:18Z
date copyright3/11/2022 12:00:00 AM
date issued2022
identifier issn1043-7398
identifier otherep_144_02_021117.pdf
identifier urihttp://yetl.yabesh.ir/yetl1/handle/yetl/4284734
description abstractFlexible electronics is emerging as a new consumer-industry phenomenon. The promise of additively printed flexible electronics has sparked interest in a detailed understanding of the parameters and interactions of the printing process with the realized performance. Aerosol Jet printing technology has garnered increased interest, owing to a noncontact nature of print process and the high standoff allowing for printing on nonplanar surfaces. Prior efforts with aerosol-jet printing have focused on single-layer substrates. The current efforts focus on higher end printed circuit boards designs, which may need multilayers, with multilayer stacking of interconnections and z-axis connections through vias. The results presented in the paper attempt to address the need for process recipes for multilayer circuits and z-axis interconnects. Aerosol printing method has been shown to have wide compatibility with wide array of inks such as silver, copper, and carbon. Realization of high-volume scale-up of the process needs process recipes with statistical assessment of process stability and variance. In this paper, z-axis interconnects have been realized with the help of Aerosol printable silver ink and dielectric polyimide ink. The interaction of the sintering profile and the realized conductivity and shear load value of the printed conductive metal layers has been presented for each of the additional layers. Additive build-up processes may need successive exposure to temperature for the purpose of sintering. The downstream-printed conductive lines would undergo different sintering conditions and would then be tested for parameters such as interconnect resistance and shear load to failure. This paper explores the printing of multilayer up to eight conductive layers. Sintering profile for lower resistance per unit length and higher shear load to failure was tested.
publisherThe American Society of Mechanical Engineers (ASME)
titleProcess-Recipe Development for Printing of Multilayer Circuitry With Z-Axis Interconnects Using Aerosol-Jet Printed Dielectric Vias
typeJournal Paper
journal volume144
journal issue2
journal titleJournal of Electronic Packaging
identifier doi10.1115/1.4053766
journal fristpage21117-1
journal lastpage21117-11
page11
treeJournal of Electronic Packaging:;2022:;volume( 144 ):;issue: 002
contenttypeFulltext


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