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contributor authorHuang, Xiaoguang
contributor authorWang, Zhiqiang
date accessioned2022-02-04T22:53:07Z
date available2022-02-04T22:53:07Z
date copyright3/1/2020 12:00:00 AM
date issued2020
identifier issn1043-7398
identifier otherep_142_01_011013.pdf
identifier urihttp://yetl.yabesh.ir/yetl1/handle/yetl/4275632
description abstractThermal fatigue failure of microelectronic chip often initiates from the interface between solder and substrate, and the service life of the chip is largely dependent on the singular stress–strain at this interface. To provide a reasonable life evaluation method, three thermal fatigue evaluation models, including strain-based and stress–strain based, have been established in terms of the interfacial singular fields. Thermal fatigue lives of different chips under different thermal cycles are obtained by thermal fatigue tests, and the stress and strain intensity factors and singular orders at the solder/substrate interface are computed at the same conditions, to determine the material constants in the established models. The thermal fatigue lives predicted are in acceptable agreement with the experimental results. What is more, the application of these thermal fatigue models demonstrates a fact that the thermal fatigue of the microelectronic chips can be evaluated uniformly no matter what the shapes, dimensions of the chip, and the thermomechanical properties of the solders are, as long as the relevant stress–strain intensity factors and singular orders are obtained.
publisherThe American Society of Mechanical Engineers (ASME)
titleThermal Fatigue Evaluation Model of a Microelectronic Chip in Terms of Interfacial Singularity
typeJournal Paper
journal volume142
journal issue1
journal titleJournal of Electronic Packaging
identifier doi10.1115/1.4045255
journal fristpage011013-1
journal lastpage011013-9
page9
treeJournal of Electronic Packaging:;2020:;volume( 142 ):;issue: 001
contenttypeFulltext


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