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contributor authorLamaison, Nicolas
contributor authorBraz Marcinichen, Jackson
contributor authorRichard Thome, John
date accessioned2017-05-09T00:57:42Z
date available2017-05-09T00:57:42Z
date issued2013
identifier issn1528-9044
identifier otherep_135_03_030908.pdf
identifier urihttp://yetl.yabesh.ir/yetl/handle/yetl/151430
description abstractOnchip twophase cooling of parallel pseudoCPUs integrated into a liquid pumped cooling cycle is modeled and experimentally verified versus a prototype test loop. The system's dynamic operation is studied since the heat dissipated by microprocessors is continuously changing during their operation and critical heat flux (CHF) conditions in the microevaporator must be avoided by flow control of the pump speed during heat load disturbances. The purpose here is to cool down multiple microprocessors in parallel and their auxiliary electronics (memories, dc/dc converters, etc.) to emulate datacenter servers with multiple CPUs. The dynamic simulation code was benchmarked using the test results obtained in an experimental facility consisting of a liquid pumped cooling cycle assembled in a test loop with two parallel microevaporators, which were evaluated under steadystate and transient conditions of balanced and unbalanced heat fluxes on the two pseudochips. The errors in the model's predictions of mean chip temperature and mixed exit vapor quality at steady state remained within آ±10%. Transient comparisons showed that the trends and the time constants were satisfactorily respected. A case study considering four microprocessors cooled in parallel flow was then simulated for different levels of heat flux in the microprocessors (40, 30, 20, and 10 W cm−2), which showed the robustness of the predictivecorrective solver used. For a desired mixed vapor exit quality of 30%, at an inlet pressure and subcooling of 1600 kPa and 3 K, the resulting distribution of mass flow rate in the microevaporators was, respectively, 2.6, 2.9, 4.2, and 6.4 kg h−1 (mass fluxes of 47, 53, 76 and 116 kg m−2 s−1) and yielded approximately uniform chip temperatures (maximum variation of 2.6, 2, 1.7, and 0.7 K). The vapor quality and maximum chip temperature remained below the critical limits during both transient and steadystate regimes.
publisherThe American Society of Mechanical Engineers (ASME)
titleTwo Phase Flow Control of Electronics Cooling With Pseudo CPUs in Parallel Flow Circuits: Dynamic Modeling and Experimental Evaluation
typeJournal Paper
journal volume135
journal issue3
journal titleJournal of Electronic Packaging
identifier doi10.1115/1.4024590
journal fristpage30908
journal lastpage30908
identifier eissn1043-7398
treeJournal of Electronic Packaging:;2013:;volume( 135 ):;issue: 003
contenttypeFulltext


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