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contributor authorYing Feng Pang
contributor authorJonah Zhou Chen
contributor authorKaren A. Thole
contributor authorElaine P. Scott
date accessioned2017-05-09T00:15:55Z
date available2017-05-09T00:15:55Z
date copyrightMarch, 2005
date issued2005
identifier issn1528-9044
identifier otherJEPAE4-26242#59_1.pdf
identifier urihttp://yetl.yabesh.ir/yetl/handle/yetl/131674
description abstractA methodology was developed and implemented to optimize the design layout for i_ntegrated p_ower e_lectronics m_odules (IPEMs) by considering both the electrical and thermal performances. This paper is primarily focused on the thermal aspects, which were analyzed using three-dimensional (3D) computational software tools. Implementation of the design methodology resulted in a 70 percent reduction in the common mode current, a 4 percent reduction in the size of the geometric footprint, and a 7°C reduction in the maximum temperature rise for the case studied, thus, providing an increase in the IPEM’s overall performance.
publisherThe American Society of Mechanical Engineers (ASME)
titleThermal Design and Optimization Methodology for Integrated Power Electronics Modules
typeJournal Paper
journal volume127
journal issue1
journal titleJournal of Electronic Packaging
identifier doi10.1115/1.1849233
journal fristpage59
journal lastpage66
identifier eissn1043-7398
keywordsTemperature
keywordsDesign
keywordsCeramics
keywordsCopper AND Optimization
treeJournal of Electronic Packaging:;2005:;volume( 127 ):;issue: 001
contenttypeFulltext


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