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contributor authorBen-Je Lwo
contributor authorTung-Sheng Chen
contributor authorChing-Hsing Kao
contributor authorYu-Lin Lin
date accessioned2017-05-09T00:07:12Z
date available2017-05-09T00:07:12Z
date copyrightJune, 2002
date issued2002
identifier issn1528-9044
identifier otherJEPAE4-26203#115_1.pdf
identifier urihttp://yetl.yabesh.ir/yetl/handle/yetl/126627
description abstractIn our previous works, the piezoresistive sensors have been demonstrated to be accurate and efficient tools for stress measurements in microelectronic packaging. In this study, we first designed test chips with piezoresistive stress sensors, temperature sensors as well as heats, and the test wafers were next manufactured through commercialized IC processes. Piezoresistive sensors on silicon strips, which were cut directly from silicon wafers at a specific angle, were then calibrated, and highly consistent piezoresistive coefficients were extracted at various wafer sites so that both normal and shear stress on the test chips can be measured. Finally, we packaged the test chips into 100-pin PQFP structures with different batches and measured internal stresses on the test chips inside the packaging. After measuring packaging induced stresses as well as thermal stresses on several batches of PQFPs, it was found that the normal stress diversities were obvious from different batches of the packaging structure, and the shearing stresses were approximately zero in all of the PQFPs at different chip site.
publisherThe American Society of Mechanical Engineers (ASME)
titleIn-Plane Packaging Stress Measurements Through Piezoresistive Sensors
typeJournal Paper
journal volume124
journal issue2
journal titleJournal of Electronic Packaging
identifier doi10.1115/1.1452244
journal fristpage115
journal lastpage121
identifier eissn1043-7398
keywordsMeasurement
keywordsSensors
keywordsStress
keywordsPackaging
keywordsCalibration AND Semiconductor wafers
treeJournal of Electronic Packaging:;2002:;volume( 124 ):;issue: 002
contenttypeFulltext


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