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contributor authorKrishna Darbha
contributor authorAbhijit Dasgupta
date accessioned2017-05-09T00:04:36Z
date available2017-05-09T00:04:36Z
date copyrightJune, 2001
date issued2001
identifier issn1528-9044
identifier otherJEPAE4-26192#147_1.pdf
identifier urihttp://yetl.yabesh.ir/yetl/handle/yetl/125044
description abstractThe nested finite element methodology (NFEM) presented in Part I of this series, is used in this paper to analyze the viscoplastic stress-state in a flip-chip-on-board (FCOB) and a chip scale package subjected to temperature cycling loads. The results are validated with conventional finite element method (CFEM). An energy-partitioning (EP) damage model is used to predict cycles to failure, based on the energy densities obtained from NFEM and CFEM, and results are compared with experiments.
publisherThe American Society of Mechanical Engineers (ASME)
titleA Nested Finite Element Methodology (NFEM) for Stress Analysis of Electronic Products—Part II: Durability Analysis of Flip Chip and Chip Scale Interconnects
typeJournal Paper
journal volume123
journal issue2
journal titleJournal of Electronic Packaging
identifier doi10.1115/1.1328745
journal fristpage147
journal lastpage155
identifier eissn1043-7398
keywordsCreep
keywordsSolders
keywordsDurability
keywordsFinite element analysis
keywordsStress
keywordsStress
keywordsStress analysis (Engineering)
keywordsFlip-chip devices
keywordsIntegrated circuits
keywordsPitch (Bituminous material)
keywordsElectronic products
keywordsMaterials properties
keywordsSolder joints
keywordsCycles
keywordsTemperature AND Failure
treeJournal of Electronic Packaging:;2001:;volume( 123 ):;issue: 002
contenttypeFulltext


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