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contributor authorAnh X. H. Dang
contributor authorSwapan K. Bhattacharya
contributor authorI. Charles Ume
date accessioned2017-05-09T00:02:12Z
date available2017-05-09T00:02:12Z
date copyrightJune, 2000
date issued2000
identifier issn1528-9044
identifier otherJEPAE4-26181#77_1.pdf
identifier urihttp://yetl.yabesh.ir/yetl/handle/yetl/123550
description abstractPotential application of stainless steel (SS) as a base substrate material for a large area MCM-D packaging is reported in this paper. A test vehicle was fabricated using 0.008 in. thick and 12 in.×12 in. SS panel with laser drilled 0.01 in. vias. A dielectric material (Parylene N) was deposited on the SS panel and around the inside via walls in order to electrically isolate the via filling material from the body of the SS substrate and also making the SS surface non-conductive. Vias were filled using a commercially available conductive via-plug material. The test structure was exposed to elevated temperatures to simulate the thermal excursion the substrate would be subjected to during the MCM-D thin film process. The end objective of this work is to be able to fabricate large area (24 in.×24 in.) SS substrates for next generation MCM-D packaging with reduced warpage. This paper reports results of the dynamic warpage measurement during thermal cycling of a 12 in.×12 in. Parylene N coated SS substrate. [S1043-7398(00)00602-2]
publisherThe American Society of Mechanical Engineers (ASME)
titleMeasurement of Dynamic Warpage During Thermal Cycling of Dielectric Coated SS Substrates for Large Area MCM-D Packaging
typeJournal Paper
journal volume122
journal issue2
journal titleJournal of Electronic Packaging
identifier doi10.1115/1.483138
journal fristpage77
journal lastpage85
identifier eissn1043-7398
keywordsTemperature
keywordsWarping AND Project tasks
treeJournal of Electronic Packaging:;2000:;volume( 122 ):;issue: 002
contenttypeFulltext


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