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contributor authorM. I. Campbell
contributor authorC. H. Amon
contributor authorJ. Cagan
date accessioned2017-05-08T23:53:13Z
date available2017-05-08T23:53:13Z
date copyrightJune, 1997
date issued1997
identifier issn1528-9044
identifier otherJEPAE4-26160#106_1.pdf
identifier urihttp://yetl.yabesh.ir/yetl/handle/yetl/118539
description abstractThis work introduces an algorithm that uses simulated annealing to perform electronic component layout while incorporating constraints related to thermal performance. A hierarchical heat transfer analysis is developed which is used in conjunction with the simulated annealing algorithm to produce final layout configurations that are densely packed and operate within specified temperature ranges. Examples of three-dimensional component placement test cases are presented including an application to embedded wearable computers.
publisherThe American Society of Mechanical Engineers (ASME)
titleOptimal Three-Dimensional Placement of Heat Generating Electronic Components
typeJournal Paper
journal volume119
journal issue2
journal titleJournal of Electronic Packaging
identifier doi10.1115/1.2792210
journal fristpage106
journal lastpage113
identifier eissn1043-7398
keywordsHeat AND Electronic components
treeJournal of Electronic Packaging:;1997:;volume( 119 ):;issue: 002
contenttypeFulltext


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