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contributor authorS. M. Heinrich
contributor authorP. S. Lee
contributor authorS. Shakya
date accessioned2017-05-08T23:53:08Z
date available2017-05-08T23:53:08Z
date copyrightDecember, 1997
date issued1997
identifier issn1528-9044
identifier otherJEPAE4-26163#218_1.pdf
identifier urihttp://yetl.yabesh.ir/yetl/handle/yetl/118505
description abstractAn analytical expression is derived for determining the maximum solder joint shearing displacement occurring in an a real-array interconnect under global CTE mismatch loading. The result may be viewed as a “load correction factor” to be applied to the commonly used estimate which is based on the free thermal expansion of component and substrate. The new expression for the correction factor includes the following parameters: (a) dimensions and material properties of component and substrate; (b) array size and population; (c) material properties of solder; and (d) geometric parameters of the individual joints. The theoretical result is based on modeling the assembly as two circular elastic disks connected by a shear-type “elastic foundation” whose distributed shear stiffness is related to the joint/array characteristics. The analytical expression and the graphical aids presented herein may provide convenient alternatives to performing time-consuming and expensive finite element “macro-analyses” on the assembly for the purpose of specifying boundary conditions for a subsequent “micro-analysis” on a single joint.
publisherThe American Society of Mechanical Engineers (ASME)
titleImproved Analytical Estimate of Global CTE Mismatch Displacement in Areal-Array Solder Joints
typeJournal Paper
journal volume119
journal issue4
journal titleJournal of Electronic Packaging
identifier doi10.1115/1.2792240
journal fristpage218
journal lastpage227
identifier eissn1043-7398
keywordsDisplacement AND Solder joints
treeJournal of Electronic Packaging:;1997:;volume( 119 ):;issue: 004
contenttypeFulltext


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