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contributor authorEdward Jih
contributor authorYi-Hsin Pao
date accessioned2017-05-08T23:46:54Z
date available2017-05-08T23:46:54Z
date copyrightJune, 1995
date issued1995
identifier issn1528-9044
identifier otherJEPAE4-26149#94_1.pdf
identifier urihttp://yetl.yabesh.ir/yetl/handle/yetl/115153
description abstractFailures in electronic packaging under thermal fatigue often result from cracking in solder joints due to creep/fatigue crack growth. A nonlinear, time-dependent finite element analysis was performed to study the effect of critical design parameters on thermal reliability of leadless chip capacitor or resistor solder joints. The shear strain range based on thermal hysteresis response was used to study the sensitivity of various parameters, such as solder stand-off height, fillet geometry, Cu-pad length, and component length and thickness. The results were used as guidelines for designing reliable solder joints. In addition, an analytical model for the solder joint assembly was derived. It can be used .as an engineering approach for rapid assessment of large numbers of design parameters. The accuracy and effectiveness of the analytical model were evaluated by comparing with finite element results.
publisherThe American Society of Mechanical Engineers (ASME)
titleEvaluation of Design Parameters for Leadless Chip Resistors Solder Joints
typeJournal Paper
journal volume117
journal issue2
journal titleJournal of Electronic Packaging
identifier doi10.1115/1.2792087
journal fristpage94
journal lastpage99
identifier eissn1043-7398
keywordsDesign
keywordsResistors
keywordsSolder joints
keywordsFinite element analysis
keywordsFracture (Process)
keywordsFailure
keywordsFatigue cracks
keywordsGeometry
keywordsCreep
keywordsFatigue
keywordsSolders
keywordsManufacturing
keywordsReliability
keywordsElectronic packaging
keywordsShear (Mechanics) AND Thickness
treeJournal of Electronic Packaging:;1995:;volume( 117 ):;issue: 002
contenttypeFulltext


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