YaBeSH Engineering and Technology Library

    • Journals
    • PaperQuest
    • YSE Standards
    • YaBeSH
    • Login
    View Item 
    •   YE&T Library
    • ASME
    • Journal of Manufacturing Science and Engineering
    • View Item
    •   YE&T Library
    • ASME
    • Journal of Manufacturing Science and Engineering
    • View Item
    • All Fields
    • Source Title
    • Year
    • Publisher
    • Title
    • Subject
    • Author
    • DOI
    • ISBN
    Advanced Search
    JavaScript is disabled for your browser. Some features of this site may not work without it.

    Archive

    Parallelism Improvement of Ground Silicon Wafers

    Source: Journal of Manufacturing Science and Engineering:;1991:;volume( 113 ):;issue: 001::page 25
    Author:
    S. Matsui
    ,
    T. Horiuchi
    DOI: 10.1115/1.2899618
    Publisher: The American Society of Mechanical Engineers (ASME)
    Abstract: This paper discusses substituting grinding for lapping in machining processes of silicon wafers. To attain this goal, the rotating wafer grinding method, in which a rotating wafer is ground by continuous infeed of a cup wheel, is investigated. The parallelism of a silicon wafer ground by this method is within 2 μm for a 5 in. (125 mm) wafer.
    keyword(s): Semiconductor wafers , Grinding , Wheels AND Machining ,
    • Download: (590.2Kb)
    • Show Full MetaData Hide Full MetaData
    • Get RIS
    • Item Order
    • Go To Publisher
    • Price: 5000 Rial
    • Statistics

      Parallelism Improvement of Ground Silicon Wafers

    URI
    http://yetl.yabesh.ir/yetl1/handle/yetl/108859
    Collections
    • Journal of Manufacturing Science and Engineering

    Show full item record

    contributor authorS. Matsui
    contributor authorT. Horiuchi
    date accessioned2017-05-08T23:36:03Z
    date available2017-05-08T23:36:03Z
    date copyrightFebruary, 1991
    date issued1991
    identifier issn1087-1357
    identifier otherJMSEFK-27748#25_1.pdf
    identifier urihttp://yetl.yabesh.ir/yetl/handle/yetl/108859
    description abstractThis paper discusses substituting grinding for lapping in machining processes of silicon wafers. To attain this goal, the rotating wafer grinding method, in which a rotating wafer is ground by continuous infeed of a cup wheel, is investigated. The parallelism of a silicon wafer ground by this method is within 2 μm for a 5 in. (125 mm) wafer.
    publisherThe American Society of Mechanical Engineers (ASME)
    titleParallelism Improvement of Ground Silicon Wafers
    typeJournal Paper
    journal volume113
    journal issue1
    journal titleJournal of Manufacturing Science and Engineering
    identifier doi10.1115/1.2899618
    journal fristpage25
    journal lastpage28
    identifier eissn1528-8935
    keywordsSemiconductor wafers
    keywordsGrinding
    keywordsWheels AND Machining
    treeJournal of Manufacturing Science and Engineering:;1991:;volume( 113 ):;issue: 001
    contenttypeFulltext
    DSpace software copyright © 2002-2015  DuraSpace
    نرم افزار کتابخانه دیجیتال "دی اسپیس" فارسی شده توسط یابش برای کتابخانه های ایرانی | تماس با یابش
    yabeshDSpacePersian
     
    DSpace software copyright © 2002-2015  DuraSpace
    نرم افزار کتابخانه دیجیتال "دی اسپیس" فارسی شده توسط یابش برای کتابخانه های ایرانی | تماس با یابش
    yabeshDSpacePersian