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contributor authorS. Matsui
contributor authorT. Horiuchi
date accessioned2017-05-08T23:36:03Z
date available2017-05-08T23:36:03Z
date copyrightFebruary, 1991
date issued1991
identifier issn1087-1357
identifier otherJMSEFK-27748#25_1.pdf
identifier urihttp://yetl.yabesh.ir/yetl/handle/yetl/108859
description abstractThis paper discusses substituting grinding for lapping in machining processes of silicon wafers. To attain this goal, the rotating wafer grinding method, in which a rotating wafer is ground by continuous infeed of a cup wheel, is investigated. The parallelism of a silicon wafer ground by this method is within 2 μm for a 5 in. (125 mm) wafer.
publisherThe American Society of Mechanical Engineers (ASME)
titleParallelism Improvement of Ground Silicon Wafers
typeJournal Paper
journal volume113
journal issue1
journal titleJournal of Manufacturing Science and Engineering
identifier doi10.1115/1.2899618
journal fristpage25
journal lastpage28
identifier eissn1528-8935
keywordsSemiconductor wafers
keywordsGrinding
keywordsWheels AND Machining
treeJournal of Manufacturing Science and Engineering:;1991:;volume( 113 ):;issue: 001
contenttypeFulltext


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