| contributor author | Tsung-Yu Pan | |
| contributor author | Yi-Hsin Pao | |
| date accessioned | 2017-05-08T23:32:26Z | |
| date available | 2017-05-08T23:32:26Z | |
| date copyright | March, 1990 | |
| date issued | 1990 | |
| identifier issn | 1528-9044 | |
| identifier other | JEPAE4-26114#30_1.pdf | |
| identifier uri | http://yetl.yabesh.ir/yetl/handle/yetl/106795 | |
| description abstract | A linear-elastic analytical model has been developed to describe the deformed geometry of a multi-layered stack assembly subject to thermal loading. The model is based on Timoshenko’s bimetal thermostat analysis [1] and consists of a series of first-order polynomial equations. The radius of curvature, bending moment, force, horizontal and vertical displacements can be determined numerically. These quantities match well with finite element analysis. Calculations for silicon power transistor stacks are presented in order to demonstrate the model capability. The results from this analyitcal model have been found to correlate well with experimental measurements when an appropriate secant modulus is used to represent the nonlinear stress-strain behavior of solder. | |
| publisher | The American Society of Mechanical Engineers (ASME) | |
| title | Deformation in Multilayer Stacked Assemblies | |
| type | Journal Paper | |
| journal volume | 112 | |
| journal issue | 1 | |
| journal title | Journal of Electronic Packaging | |
| identifier doi | 10.1115/1.2904337 | |
| journal fristpage | 30 | |
| journal lastpage | 34 | |
| identifier eissn | 1043-7398 | |
| keywords | Force | |
| keywords | Deformation | |
| keywords | Measurement | |
| keywords | Solders | |
| keywords | Manufacturing | |
| keywords | Stress | |
| keywords | Temperature controls | |
| keywords | Finite element analysis | |
| keywords | Equations | |
| keywords | Geometry | |
| keywords | Polynomials | |
| keywords | Silicon AND Transistors | |
| tree | Journal of Electronic Packaging:;1990:;volume( 112 ):;issue: 001 | |
| contenttype | Fulltext | |