Search
Now showing items 1-4 of 4
A New Thermal-Fatigue Life Prediction Model for Wafer Level Chip Scale Package (WLCSP) Solder Joints
Publisher: The American Society of Mechanical Engineers (ASME)
Abstract: A new empirical equation for predicting the thermal-fatigue life of wafer level chip scale package (WLCSP) solder joints on printed circuit board (PCB) is presented. The solder joints are ...
Creep Analysis of Wafer Level Chip Scale Package (WLCSP) With 96.5Sn-3.5Ag and 100In Lead-Free Solder Joints and Microvia Build-Up Printed Circuit Board
Publisher: The American Society of Mechanical Engineers (ASME)
Abstract: In this study, time-temperature-dependent nonlinear analyses of lead-free solder bumped wafer level chip scale package (WLCSP) on printed circuit board (PCB) assemblies subjected to thermal cycling ...
Solder Joint Reliability of Wafer Level Chip Scale Packages (WLCSP): A Time-Temperature-Dependent Creep Analysis
Publisher: The American Society of Mechanical Engineers (ASME)
Abstract: A novel and reliable wafer level chip scale package (WLCSP) is investigated in this paper. It consists of a copper conductor layer and two low cost dielectric layers. The bump geometry consists ...
Nonlinear-Time-Dependent Analysis of Micro Via-In-Pad Substrates for Solder Bumped Flip Chip Applications
Publisher: The American Society of Mechanical Engineers (ASME)
Abstract: An elasto-plastic-creep analysis of a low-cost micro via-in-pad (VIP) substrate for supporting a solder bumped flip chip in a chip scale package (CSP) format which is soldered onto a printed ...