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dc.contributor.authorKimura, Yasuhiro
dc.contributor.authorSaka, Masumi
dc.date.accessioned2019-09-18T09:04:46Z
dc.date.available2019-09-18T09:04:46Z
dc.date.copyright4/10/2019 12:00:00 AM
dc.date.issued2019
dc.identifier.issn1043-7398
dc.identifier.otherep_141_02_021008.pdf
dc.identifier.urihttp://yetl.yabesh.ir/yetl1/handle/yetl/4258604
dc.description.abstractA critical current density, a criterion of electromigration (EM) resistance in interconnects, above which EM damages initiate has been studied to minimize EM damages of interconnects. In general, the assessment of a critical current density is confined to straight interconnect called as Blech specimen, although the critical current density is sensitive to structural characteristic. This work proposes a procedure of predicting a critical current density for any arbitrary-configuration interconnect by using the analogy between atomic density and electrical potential. In the models of straight and barrel interconnects as the typical solder bumps in modern flip-chip technology, the critical current density is predicted through calculating electrical potential by proposed formulation and simulation based on the finite element analysis (FEA). The critical current density for straight interconnect obtained by experiment leads to numerically calculate the critical electrical potential, which is independent of interconnect configuration. The critical potential corresponds to the critical atomic density, below which the accumulation of atoms allows. The calculated critical electrical potential determines a critical current density for arbitrary-configuration interconnect including current crowding effect. This finding can predict a critical current density for actual arbitrary-configuration model and provide an insight for the applying to the packaging design such as ball grid array and C4 flip-chip solder bumps.
dc.publisherAmerican Society of Mechanical Engineers (ASME)
dc.titlePrediction of Electromigration Critical Current Density in Passivated Arbitrary-Configuration Interconnect
dc.typeJournal Paper
dc.journal.volume141
dc.journal.issue2
dc.journal.titleJournal of Electronic Packaging
dc.identifier.doi10.1115/1.4042980
dc.journal.fristpage21008
dc.treeJournal of Electronic Packaging:;2019:;volume( 141 ):;issue: 002
dc.contenttypeFulltext


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