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dc.contributor.authorLiu, Peisheng
dc.contributor.authorWang, Jinlan
dc.contributor.authorTong, Liangyu
dc.contributor.authorTao, Yujuan
dc.date.accessioned2017-05-09T01:06:49Z
dc.date.available2017-05-09T01:06:49Z
dc.date.issued2014
dc.identifier.issn1528-9044
dc.identifier.otherep_136_02_024002.pdf
dc.identifier.urihttp://yetl.yabesh.ir/yetl/handle/yetl/154469
dc.description.abstractFast development of wafer level packaging (WLP) in recent years is mainly owing to the advances in integrated circuit fabrication process and the market demands for devices with high electrical performance, small form factor, low cost etc. This paper reviews the advances of WLP technology in recent years. An overall introduction to WLP is presented in the first part. The fabrication processes of WLP and redistribution technology are introduced in the second part. Reliability problems of WLPs, such as the strength of solder joints and reliability problems concerning fanout WLPs are introduced in the third part. Typical applications of WLP technologies are discussed in the last part, which include the application of fanout WLP, 3D packaging integrating with WLP technologies and its application in microelectromechanical systems (MEMS).
dc.publisherThe American Society of Mechanical Engineers (ASME)
dc.titleAdvances in the Fabrication Processes and Applications of Wafer Level Packaging
dc.typeJournal Paper
dc.journal.volume136
dc.journal.issue2
dc.journal.titleJournal of Electronic Packaging
dc.identifier.doi10.1115/1.4027397
dc.journal.fristpage24002
dc.journal.lastpage24002
dc.identifier.eissn1043-7398
dc.treeJournal of Electronic Packaging:;2014:;volume( 136 ):;issue: 002
dc.contenttypeFulltext


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