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    Advances in the Fabrication Processes and Applications of Wafer Level Packaging

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    ep_136_02_024002.pdf (1.707Mb)
    Date
    2014
    Author
    Liu, Peisheng
    Wang, Jinlan
    Tong, Liangyu
    Tao, Yujuan
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    Abstract
    Fast development of wafer level packaging (WLP) in recent years is mainly owing to the advances in integrated circuit fabrication process and the market demands for devices with high electrical performance, small form factor, low cost etc. This paper reviews the advances of WLP technology in recent years. An overall introduction to WLP is presented in the first part. The fabrication processes of WLP and redistribution technology are introduced in the second part. Reliability problems of WLPs, such as the strength of solder joints and reliability problems concerning fanout WLPs are introduced in the third part. Typical applications of WLP technologies are discussed in the last part, which include the application of fanout WLP, 3D packaging integrating with WLP technologies and its application in microelectromechanical systems (MEMS).
    URI
    http://yetl.yabesh.ir/yetl/handle/yetl/154469
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    • Journal of Electronic Packaging

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