Three Dimensional and 2.5 Dimensional Interconnection Technology: State of the Art

Abstract

Threedimensional (3D) packaging with throughsiliconvias (TSVs) is an emerging technology featuring smaller package size, higher interconnection density, and better performance; 2.5D packaging using silicon interposers with TSVs is an incremental step toward 3D packaging. Formation of TSVs and interconnection between chips and/or wafers are two key enabling technologies for 3D and 2.5D packaging, and different interconnection methods in chiptochip, chiptowafer, and wafertowafer schemes have been developed. This article reviews stateoftheart interconnection technologies reported in recent technical papers. Issues such as bump formation, assembly/bonding process, as well as underfill dispensing in each interconnection type are discussed.