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dc.contributor.authorOkereke, Raphael
dc.contributor.authorKacker, Karan
dc.contributor.authorSitaraman, Suresh K.
dc.date.accessioned2017-05-09T00:57:43Z
dc.date.available2017-05-09T00:57:43Z
dc.date.issued2013
dc.identifier.issn1528-9044
dc.identifier.otherep_135_03_031004.pdf
dc.identifier.urihttp://yetl.yabesh.ir/yetl/handle/yetl/151435
dc.description.abstractThis paper presents a study on a dualpath compliant interconnect design which attempts to improve the balance between mechanical compliance and electrical parasitics by using multiple electrical paths in place of a single electrical path. The high compliance of the parallelpath compliant interconnect structure will ensure the reliability of lowK dies. Implementation of this interconnect technology can be cost effective by using a waferlevel process and by eliminating the underfill process. Although an underfill is not required for thermomechanical reliability purposes, an underfill may be used for reducing contamination and oxidation of the interconnects and also to provide additional rigidity against mechanical loads. Therefore, this paper also examines the role of an underfill on the thermomechanical reliability of a dualpath compliant interconnect.
dc.publisherThe American Society of Mechanical Engineers (ASME)
dc.titleInvestigation of Dual Electrical Paths for Off Chip Compliant Interconnects
dc.typeJournal Paper
dc.journal.volume135
dc.journal.issue3
dc.journal.titleJournal of Electronic Packaging
dc.identifier.doi10.1115/1.4024112
dc.journal.fristpage31004
dc.journal.lastpage31004
dc.identifier.eissn1043-7398
dc.treeJournal of Electronic Packaging:;2013:;volume( 135 ):;issue: 003
dc.contenttypeFulltext


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