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    Investigation of Dual Electrical Paths for Off Chip Compliant Interconnects

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    ep_135_03_031004.pdf (2.176Mb)
    Date
    2013
    Author
    Okereke, Raphael
    Kacker, Karan
    Sitaraman, Suresh K.
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    Abstract
    This paper presents a study on a dualpath compliant interconnect design which attempts to improve the balance between mechanical compliance and electrical parasitics by using multiple electrical paths in place of a single electrical path. The high compliance of the parallelpath compliant interconnect structure will ensure the reliability of lowK dies. Implementation of this interconnect technology can be cost effective by using a waferlevel process and by eliminating the underfill process. Although an underfill is not required for thermomechanical reliability purposes, an underfill may be used for reducing contamination and oxidation of the interconnects and also to provide additional rigidity against mechanical loads. Therefore, this paper also examines the role of an underfill on the thermomechanical reliability of a dualpath compliant interconnect.
    URI
    http://yetl.yabesh.ir/yetl/handle/yetl/151435
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