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dc.contributor.authorSatoru Katsurayama
dc.contributor.authorHironori Tohmyoh
dc.date.accessioned2017-05-09T00:32:17Z
dc.date.available2017-05-09T00:32:17Z
dc.date.copyrightSeptember, 2009
dc.date.issued2009
dc.identifier.issn1528-9044
dc.identifier.otherJEPAE4-26298#031005_1.pdf
dc.identifier.urihttp://yetl.yabesh.ir/yetl/handle/yetl/140284
dc.description.abstractIn flip chip packages, it is common practice for interconnects to be encapsulated with a liquid underfill material. This paper describes the effects of different underfill processes, i.e., the conventional capillary-flow underfill and two no-flow underfill processes, on flip chip packaging. The warpage of the package was examined, and the value of this during three different underfill encapsulating processes was measured. In addition, the interconnect reliability of the bump bonds after thermal-cycling was evaluated using a test circuit. The warpage of the package before curing varied depending on the assembly process, but that after curing was almost the same for all the processes studied. It was found that the interconnect reliability is closely related to the differences in the warpage arising from the assembly process, and that the smaller change in warpage introduced by the curing process gave a higher interconnect reliability for the bump bonds. Based on these findings, lower curing temperatures are considered to be more effective for improving the mountability of the package and the interconnect reliability.
dc.publisherThe American Society of Mechanical Engineers (ASME)
dc.titleEffect of Warpage of Flip Chip Packages Due to the Underfill Encapsulating Process on Interconnect Reliability
dc.typeJournal Paper
dc.journal.volume131
dc.journal.issue3
dc.journal.titleJournal of Electronic Packaging
dc.identifier.doi10.1115/1.3144153
dc.journal.fristpage31005
dc.identifier.eissn1043-7398
dc.keywordsTemperature
dc.keywordsManufacturing
dc.keywordsReliability
dc.keywordsWarping
dc.keywordsCuring
dc.keywordsFlip-chip packages AND Low temperature
dc.treeJournal of Electronic Packaging:;2009:;volume( 131 ):;issue: 003
dc.contenttypeFulltext


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