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contributor authorBruce C. Kim
contributor authorFalah Mohammed
contributor authorByoungchul Ahn
contributor authorSukeshwar Kannan
contributor authorAnurag Gupta
date accessioned2017-05-09T00:40:16Z
date available2017-05-09T00:40:16Z
date copyrightMay, 2010
date issued2010
identifier issn1949-2944
identifier otherJNEMAA-28035#021012_1.pdf
identifier urihttp://yetl.yabesh.ir/yetl/handle/yetl/144553
description abstractThe design and development of reliable 3D integrated systems require high performance interconnects, which in turn are largely dependent on the choice of filler materials used in through-silicon vias (TSVs). Copper, tungsten, and poly-silicon have been explored as filler materials; however, issues such as thermal incompatibility, electromigration, and high resistivity are still a bottleneck. In this paper, we investigate single-walled carbon nanotube (CNT) bundles as a prospective filler material for TSVs and have provided an analysis of CNT based TSVs for package and chip interconnects. The interconnects are fundamental bottlenecks to achieving high performance and reliability. We have provided electrical modeling and performed simulations on TSVs with copper and carbon nanotubes. The results from the CNT based TSVs were greatly superior to those from the conventional vias with copper.
publisherThe American Society of Mechanical Engineers (ASME)
titleDevelopment of Carbon Nanotube Based Through-Silicon Vias
typeJournal Paper
journal volume1
journal issue2
journal titleJournal of Nanotechnology in Engineering and Medicine
identifier doi10.1115/1.4001537
journal fristpage21012
identifier eissn1949-2952
keywordsCarbon nanotubes AND Silicon
treeJournal of Nanotechnology in Engineering and Medicine:;2010:;volume( 001 ):;issue: 002
contenttypeFulltext


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