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    Experimental and Numerical Investigation of Interdie Thermal Resistance in Three-Dimensional Integrated Circuits 

    Source: Journal of Electronic Packaging:;2017:;volume( 139 ):;issue: 002:;page 20908
    Author(s): Choobineh, Leila; Jones, Jared; Jain, Ankur
    Publisher: The American Society of Mechanical Engineers (ASME)
    Abstract: Three-dimensional integrated circuits (3D ICs) attract much interest due to several advantages over traditional microelectronics design, such as electrical performance improvement and reducing interconnect delay. While the ...
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    Minimizing Temperature Nonuniformity by Optimal Arrangement of Hotspots in Vertically Stacked Three-Dimensional Integrated Circuits 

    Source: Journal of Electronic Packaging:;2020:;volume( 142 ):;issue: 004:;page 041109-1
    Author(s): Rangarajan, Srikanth; Hadad, Yaser; Choobineh, Leila; Sammakia, Bahgat
    Publisher: The American Society of Mechanical Engineers (ASME)
    Abstract: The semiconductor packaging technologies have seen its growth from multichip module (MCM), system in package (SiP), system on chip (SoC) to the heterogeneous integration of the MCM. Thermal management of multichip vertically ...
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    Fabrication Steps and Thermal Modeling of Three-Dimensional Asynchronous Field Programmable Gate Array (3D-AFPGA) With Through Silicon Via and Copper Pillar Bonding Approach 

    Source: Journal of Electronic Packaging:;2020:;volume( 142 ):;issue: 003
    Author(s): Choobineh, Leila; Carrol, Robert; Gutierrez, Carlos; Geer, Robert
    Publisher: The American Society of Mechanical Engineers (ASME)
    Abstract: This work will specifically detail the development of a processing and fabrication route for a three-dimensional asynchronous field-programmable gate array (3D-AFPGA) design based on an extension of pre-existing ...
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