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    Transient Thermal Analysis for Board-Level Chip-Scale Packages Subjected to Coupled Power and Thermal Cycling Test Conditions 

    Source: Journal of Electronic Packaging:;2006:;volume( 128 ):;issue: 003:;page 281
    Author(s): Tong Hong Wang; Chang-Chi Lee; Yi-Shao Lai; Yu-Cheng Lin
    Publisher: The American Society of Mechanical Engineers (ASME)
    Abstract: In this work, thermal characteristics of a board-level chip-scale package, subjected to coupled power and thermal cycling test conditions defined by JEDEC, are investigated through the transient ...
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    Influence of Power Cycling Durations on Thermal and Fatigue Reliability Characteristics of Board-Level Chip-Scale Packages 

    Source: Journal of Electronic Packaging:;2009:;volume( 131 ):;issue: 001:;page 11001
    Author(s): Tong Hong Wang; Chang-Chi Lee; Yi-Shao Lai; Kuo-Yuan Lee
    Publisher: The American Society of Mechanical Engineers (ASME)
    Abstract: The sequential thermal-mechanical coupling analysis, which solves in turn the transient temperature field and subsequent thermomechanical deformations, was performed in this work to investigate ...
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