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    Translation of Stress States Into Reliability Terms for Single Chip Ceramic Packages 

    Source: Journal of Electronic Packaging:;1994:;volume( 116 ):;issue: 004:;page 258
    Author(s): Boris Mirman
    Publisher: The American Society of Mechanical Engineers (ASME)
    Abstract: This paper addresses the gap between optimistic and pessimistic analytical predictions of the reliability of microelectronic structures using the example of single chip ceramic packages. The ...
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    The Mechanics of the Edge Delamination Test 

    Source: Journal of Electronic Packaging:;1995:;volume( 117 ):;issue: 004:;page 340
    Author(s): Boris Mirman
    Publisher: The American Society of Mechanical Engineers (ASME)
    Abstract: A new test to measure the adhesion of thin polymeric coatings (the so-called “edge delamination test”) has been recently proposed by Shaffer et al. (1993), where the authors translate the test ...
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    Impact of Tapering on Interfacial Stresses 

    Source: Journal of Electronic Packaging:;1996:;volume( 118 ):;issue: 003:;page 184
    Author(s): Boris Mirman
    Publisher: The American Society of Mechanical Engineers (ASME)
    Abstract: The reduction of interfacial thermal stresses is estimated for a bimaterial strip tapered at the edges. Simple equations for this stress reduction are proposed.
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    Lead-On-Chip Versus Chip-On-Lead Packages and Solder Failure Criteria 

    Source: Journal of Electronic Packaging:;2000:;volume( 122 ):;issue: 003:;page 279
    Author(s): Boris Mirman
    Publisher: The American Society of Mechanical Engineers (ASME)
    Abstract: High impact of peeling stresses on solder joint reliability, and how to account for these stresses in failure criteria, are discussed. [S1043-7398(00)00803-3]
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    Impact of Low Temperatures on Solder Joint Failures 

    Source: Journal of Electronic Packaging:;2002:;volume( 124 ):;issue: 002:;page 135
    Author(s): Boris Mirman
    Publisher: The American Society of Mechanical Engineers (ASME)
    Abstract: An experiment with solder joints of thin plastic packages, cycled between −10° and 110°C, has demonstrated that the majority of solder joint failures occurred at the low temperatures. ...
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    Discussion: Notes on Microelectronics Packaging Handbook by Rao Tummala and Eugene Rymaszewski, Van Nostrand, 1988 

    Source: Journal of Electronic Packaging:;1990:;volume( 112 ):;issue: 002:;page 183
    Author(s): Boris Mirman
    Publisher: The American Society of Mechanical Engineers (ASME)
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    A Cause of Cracking in the Under-Bump-Metallurgy Area of Flip Chips 

    Source: Journal of Electronic Packaging:;2001:;volume( 123 ):;issue: 004:;page 405
    Author(s): Boris Mirman; Emanuel Bobrov
    Publisher: The American Society of Mechanical Engineers (ASME)
    Abstract: Plastic compressive deformation of the copper layer at high temperatures is a significant contributor for die cracking in the under-bump-metallurgy (UBM) area of flip chips.
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