Assessment of Joule Heating and Temperature Distribution on Printed Circuit Boards Via Electrothermal SimulationsSource: Journal of Electronic Packaging:;2016:;volume( 138 ):;issue: 002::page 21004Author:Baris Dogruoz, M.
DOI: 10.1115/1.4033109Publisher: The American Society of Mechanical Engineers (ASME)
Abstract: A printed circuit board (PCB) comprises a solid piece of dielectric material with embedded layers of current carrying metal traces and vias. Geometric features of these metal traces and vias in modern PCBs are highly nonuniform and complicated such that the card level or system level numerical simulations by using the actual trace and via geometries are computationally expensive. The present study investigates the effects of Joule heating in current carrying traces on the temperature distribution of PCBs by conducting oneway and twoway direct current (DC) electric and computational fluid dynamics (CFD) simulations. DC electric field simulations are performed to determine the power map of trace layers which are modeled as planar heat generating sources by using the temperaturedependent electrical conductivity of the metal trace. The power distribution varies with the implemented size and power thresholds. Thermal conductivity map of the PCB is determined by using the electronic computeraided design (ECAD) images of the individual layers. By using these planar source and thermal conductivity maps, CFD simulations are conducted to determine the resulting temperature distribution on the board. A methodology is developed and applied to a sample, complex PCB, and the generated results are compared with those of the previous studies and conventional models. The computational data show that the temperature distributions over the PCB and its mounted components experience large variations based on the implemented thermal conductivity mapping and the Joule heating modeling technique.
|
Collections
Show full item record
| contributor author | Baris Dogruoz, M. | |
| date accessioned | 2017-05-09T01:27:30Z | |
| date available | 2017-05-09T01:27:30Z | |
| date issued | 2016 | |
| identifier issn | 1528-9044 | |
| identifier other | sol_138_03_034501.pdf | |
| identifier uri | http://yetl.yabesh.ir/yetl/handle/yetl/160815 | |
| description abstract | A printed circuit board (PCB) comprises a solid piece of dielectric material with embedded layers of current carrying metal traces and vias. Geometric features of these metal traces and vias in modern PCBs are highly nonuniform and complicated such that the card level or system level numerical simulations by using the actual trace and via geometries are computationally expensive. The present study investigates the effects of Joule heating in current carrying traces on the temperature distribution of PCBs by conducting oneway and twoway direct current (DC) electric and computational fluid dynamics (CFD) simulations. DC electric field simulations are performed to determine the power map of trace layers which are modeled as planar heat generating sources by using the temperaturedependent electrical conductivity of the metal trace. The power distribution varies with the implemented size and power thresholds. Thermal conductivity map of the PCB is determined by using the electronic computeraided design (ECAD) images of the individual layers. By using these planar source and thermal conductivity maps, CFD simulations are conducted to determine the resulting temperature distribution on the board. A methodology is developed and applied to a sample, complex PCB, and the generated results are compared with those of the previous studies and conventional models. The computational data show that the temperature distributions over the PCB and its mounted components experience large variations based on the implemented thermal conductivity mapping and the Joule heating modeling technique. | |
| publisher | The American Society of Mechanical Engineers (ASME) | |
| title | Assessment of Joule Heating and Temperature Distribution on Printed Circuit Boards Via Electrothermal Simulations | |
| type | Journal Paper | |
| journal volume | 138 | |
| journal issue | 2 | |
| journal title | Journal of Electronic Packaging | |
| identifier doi | 10.1115/1.4033109 | |
| journal fristpage | 21004 | |
| journal lastpage | 21004 | |
| identifier eissn | 1043-7398 | |
| tree | Journal of Electronic Packaging:;2016:;volume( 138 ):;issue: 002 | |
| contenttype | Fulltext |