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    Micro to Macro Thermo-Mechanical Simulation of Wafer Level Packaging

    Source: Journal of Electronic Packaging:;2003:;volume( 125 ):;issue: 004::page 576
    Author:
    Chang-An Yuan
    ,
    Research Assistant
    ,
    Kou-Ning Chiang
    DOI: 10.1115/1.1604159
    Publisher: The American Society of Mechanical Engineers (ASME)
    Abstract: Due to the CPU limitation of the computer hardware currently available, the three-dimensional full-scaled finite element model of wafer level packaging is impractical for the reliability analysis and fatigue life prediction. In order to significantly reduce the simulation CPU time, an equivalent beam method based on the micro-macro technique with multi-point constraint method is proposed in the present study. The proposed novel equivalent beam consists of three/five sections to simulate the three-dimensional solder joint with different upper/lower pad size. Moreover, the total length of the proposed equivalent beam equals to the stand-of-height of the realistic solder joint. To compare the results of equivalent beam and full-scaled model, a wafer level packaging with 48 I/O is selected as a benchmark model in this study. The result shows that the equivalent beam model can reduce approximately 80 percent CPU time, and good agreement between the equivalent beam model and the full-scaled model are achieved.
    keyword(s): Semiconductor wafers , Simulation , Finite element analysis , Solder joints , Packaging , Materials properties , Fatigue life , Finite element model , Shear (Mechanics) AND Force ,
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      Micro to Macro Thermo-Mechanical Simulation of Wafer Level Packaging

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    https://yetl.yabesh.ir/yetl1/handle/yetl/128181
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    contributor authorChang-An Yuan
    contributor authorResearch Assistant
    contributor authorKou-Ning Chiang
    date accessioned2017-05-09T00:09:51Z
    date available2017-05-09T00:09:51Z
    date copyrightDecember, 2003
    date issued2003
    identifier issn1528-9044
    identifier otherJEPAE4-26225#576_1.pdf
    identifier urihttp://yetl.yabesh.ir/yetl/handle/yetl/128181
    description abstractDue to the CPU limitation of the computer hardware currently available, the three-dimensional full-scaled finite element model of wafer level packaging is impractical for the reliability analysis and fatigue life prediction. In order to significantly reduce the simulation CPU time, an equivalent beam method based on the micro-macro technique with multi-point constraint method is proposed in the present study. The proposed novel equivalent beam consists of three/five sections to simulate the three-dimensional solder joint with different upper/lower pad size. Moreover, the total length of the proposed equivalent beam equals to the stand-of-height of the realistic solder joint. To compare the results of equivalent beam and full-scaled model, a wafer level packaging with 48 I/O is selected as a benchmark model in this study. The result shows that the equivalent beam model can reduce approximately 80 percent CPU time, and good agreement between the equivalent beam model and the full-scaled model are achieved.
    publisherThe American Society of Mechanical Engineers (ASME)
    titleMicro to Macro Thermo-Mechanical Simulation of Wafer Level Packaging
    typeJournal Paper
    journal volume125
    journal issue4
    journal titleJournal of Electronic Packaging
    identifier doi10.1115/1.1604159
    journal fristpage576
    journal lastpage581
    identifier eissn1043-7398
    keywordsSemiconductor wafers
    keywordsSimulation
    keywordsFinite element analysis
    keywordsSolder joints
    keywordsPackaging
    keywordsMaterials properties
    keywordsFatigue life
    keywordsFinite element model
    keywordsShear (Mechanics) AND Force
    treeJournal of Electronic Packaging:;2003:;volume( 125 ):;issue: 004
    contenttypeFulltext
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    DSpace software copyright © 2002-2015  DuraSpace
    نرم افزار کتابخانه دیجیتال "دی اسپیس" فارسی شده توسط یابش برای کتابخانه های ایرانی | تماس با یابش
    yabeshDSpacePersian