Thermoelastic Modeling of a PWB With Simulated Circuit Traces Subjected to Infrared Reflow Soldering With Experimental Validation

Abstract

A bare, four copper layer printed wiring board with simple trace patterns was built for modeling and experimental validation purposes. In-plane elastic properties of the core materials in the board were measured as a function of temperature. Thermoelastic lamination theory was utilized to predict the warpage of the board when subjected to an infrared reflow process, with emphasis on studying the influence of thermal gradients through the board, its support conditions and CTE differential on the warpage process. Board layers with traces were approximated with quasi-homogeneous effective properties obtained using micromechanics theory. An experimental system that employs the shadow moird technique in a simulated infrared reflow environment was used to evaluate the warpage for comparison to modeled results.