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contributor authorSeo Jin Joo
contributor authorByung Man Kwak
date accessioned2017-05-08T23:46:52Z
date available2017-05-08T23:46:52Z
date copyrightDecember, 1995
date issued1995
identifier issn1528-9044
identifier otherJEPAE4-26151#275_1.pdf
identifier urihttp://yetl.yabesh.ir/yetl/handle/yetl/115126
description abstractA chip layout problem is formulated as a new class of shape optimal design called a subdomain optimization, where the chips correspond to subdomains whose configuration and location are to be decided. Shape design sensitivity analysis for a perturbed subdomain is made based on the concept of material derivative and adjoint system. Introducing a suitable category of design velocity fields, the change of the configuration is adequately describable. Sensitivities and optimal positions of chips on a printed circuit board are obtained and their accuracy discussed.
publisherThe American Society of Mechanical Engineers (ASME)
titleOptimal Chip Layout on a Printed Circuit Board Using Design Sensitivity Analysis of Subdomain Configuration
typeJournal Paper
journal volume117
journal issue4
journal titleJournal of Electronic Packaging
identifier doi10.1115/1.2792105
journal fristpage275
journal lastpage280
identifier eissn1043-7398
keywordsDesign sensitivity analysis
keywordsPrinted circuit boards
keywordsDesign
keywordsShapes AND Optimization
treeJournal of Electronic Packaging:;1995:;volume( 117 ):;issue: 004
contenttypeFulltext


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