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dc.contributor.authorLi, Yubai
dc.contributor.authorGuo, Dongzhi
dc.contributor.authorYao, Shi
dc.date.accessioned2017-05-09T01:06:47Z
dc.date.available2017-05-09T01:06:47Z
dc.date.issued2014
dc.identifier.issn1528-9044
dc.identifier.otherep_136_02_021002.pdf
dc.identifier.urihttp://yetl.yabesh.ir/yetl/handle/yetl/154460
dc.description.abstractThis study goes beyond the common microchannel cooling system composed of uniform parallel straight microchannels and proposed a threestage design approach for spatially thermalaware microchannel cooling of 2D multicore processors. By applying effective strategies and arranging key design parameters, stronger cooling is provided under the high power core area, and less cooling is provided under the low power cache area to effectively save the precious pumping power, lower the hot spot temperature and lower temperature gradients on chip. Two microchannel cooling systems are specifically designed for a 2 core 150 W Intel Tulsa processor and an 8 core 260 W (doubled power) Intel Nehalem processor with single phase HFE7100 as coolant. For the Tulsa processor, a strategy named stripandzone is used. The final design leads to 30 kPa pressure drop and 0.094 W pumping power while maintains the hot spot temperature to be 75آ°C. For the Nehalem processor, a split flow microchannel system and a wideninflow strategy are applied. A design is achieved to cost 15 kPa pressure drop and 0.0845 W pumping power while maintains the hot spot temperature to be 82.9آ°C. The design approach in this study provides the basic guide for the industrial applications of effective multicore processor cooling using microchannels.
dc.publisherThe American Society of Mechanical Engineers (ASME)
dc.titleThermal Aware Microchannel Cooling of Multicore Processors: A Three Stage Design Approach
dc.typeJournal Paper
dc.journal.volume136
dc.journal.issue2
dc.journal.titleJournal of Electronic Packaging
dc.identifier.doi10.1115/1.4027174
dc.journal.fristpage21002
dc.journal.lastpage21002
dc.identifier.eissn1043-7398
dc.treeJournal of Electronic Packaging:;2014:;volume( 136 ):;issue: 002
dc.contenttypeFulltext


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