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dc.contributor.authorHsien-Cheng Tseng
dc.date.accessioned2017-05-09T00:43:14Z
dc.date.available2017-05-09T00:43:14Z
dc.date.copyrightMarch, 2011
dc.date.issued2011
dc.identifier.issn1528-9044
dc.identifier.otherJEPAE4-26312#014501_1.pdf
dc.identifier.urihttp://yetl.yabesh.ir/yetl/handle/yetl/145827
dc.description.abstractAdvanced collector-up (C-up) heterojunction bipolar transistors (HBTs) with the thermal-via configuration (TVC) have been analyzed using a genetic algorithm (GA). Novel packaging structures are presented and evaluated in detail. With careful optimization, the thermal performance can be maximized by improving the thermal resistance over 40%, and the conventional TVC can be further reduced by 35%. The proposed approach is demonstrated on the multifinger InGaP/GaAs C-up HBT, which is attractive as the active component in power amplifiers. A comparison of measured, finite-element-calculated, and GA-extracted results has been made. Consequently, it is shown that the remarkable thermal management can be achieved with a miniature heat-dissipation design, and the thermally stable InGaP/GaAs C-up HBT should be feasible for implementation in intelligent wireless communication systems.
dc.publisherThe American Society of Mechanical Engineers (ASME)
dc.titleImproved Packaging Design for Maximizing the Thermal Performance of Multifinger Collector-Up HBTs
dc.typeJournal Paper
dc.journal.volume133
dc.journal.issue1
dc.journal.titleJournal of Electronic Packaging
dc.identifier.doi10.1115/1.4003515
dc.journal.fristpage14501
dc.identifier.eissn1043-7398
dc.keywordsDesign
dc.keywordsOptimization
dc.keywordsPackaging
dc.keywordsThermal resistance
dc.keywordsGallium arsenide AND Transistors
dc.treeJournal of Electronic Packaging:;2011:;volume( 133 ):;issue: 001
dc.contenttypeFulltext


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