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dc.contributor.authorChu-Hsuan Sha
dc.contributor.authorChin C. Lee
dc.date.accessioned2017-05-09T00:43:10Z
dc.date.available2017-05-09T00:43:10Z
dc.date.copyrightSeptember, 2011
dc.date.issued2011
dc.identifier.issn1528-9044
dc.identifier.otherJEPAE4-26316#031012_1.pdf
dc.identifier.urihttp://yetl.yabesh.ir/yetl/handle/yetl/145793
dc.description.abstractFormation of pure silver (Ag) flip-chip interconnect of silicon (Si) chips on copper (Cu) substrates is reported. Arrays of Ag columns, each 36 μm in height and 40 μm in diameter, are fabricated on 2-in. Si wafers which are first coated with chromium (Cr)/gold (Au) dual layers. The Si wafers are diced into 6 mm × 6 mm chips, each having 50 × 50 Ag columns. The Si chip with Ag columns is directly bonded to Cu substrate at 260 °C in 80 mTorr vacuum to inhibit oxidation. The static bonding pressure is as low as 680 psi (4.69 MPa), corresponding to a load of 0.021 oz (0.60 g) per column. During bonding, the Ag columns deform and conform to the Cu substrate. They are well bonded to the Cu. No molten phase is involved in the bonding process. The joints consist of pure Ag only. The ductile Ag joints are able to accommodate the thermal expansion mismatch between Si and Cu. It is well known that in nearly all soldering processes used in electronic industries, intermetallic compound (IMC) formation is essential to make a solder joint. In the pure Ag interconnect, no IMCs exist. Thus, reliability issues associated with IMCs are eliminated. Compared to tin-based lead-free solders, pure Ag joints have superior electrical and thermal properties.
dc.publisherThe American Society of Mechanical Engineers (ASME)
dc.title40 μm Silver Flip-Chip Interconnect Technology With Solid-State Bonding
dc.typeJournal Paper
dc.journal.volume133
dc.journal.issue3
dc.journal.titleJournal of Electronic Packaging
dc.identifier.doi10.1115/1.4004660
dc.journal.fristpage31012
dc.identifier.eissn1043-7398
dc.keywordsSilver
dc.keywordsBonding
dc.keywordsSilicon chips
dc.keywordsFlip-chip
dc.keywordsPressure
dc.keywordsStress
dc.keywordsVacuum
dc.keywordsLead-free solders
dc.keywordsSilicon AND Solder joints
dc.treeJournal of Electronic Packaging:;2011:;volume( 133 ):;issue: 003
dc.contenttypeFulltext


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