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dc.contributor.authorB. Wunderle
dc.contributor.authorH. Reichl
dc.contributor.authorT. Braun
dc.contributor.authorD. May
dc.contributor.authorB. Michel
dc.date.accessioned2017-05-09T00:32:22Z
dc.date.available2017-05-09T00:32:22Z
dc.date.copyrightMarch, 2009
dc.date.issued2009
dc.identifier.issn1528-9044
dc.identifier.otherJEPAE4-26292#011012_1.pdf
dc.identifier.urihttp://yetl.yabesh.ir/yetl/handle/yetl/140329
dc.description.abstractThe use of multilayer ceramic chip capacitors as integrated passive in, e.g., system in package applications needs methods to examine and predict their reliability. Therefore, a nondestructive failure analytical technique is described to detect cracks in the ceramic and the metallic layers within encapsulated 0402 surface mount device (SMD) capacitors. After choosing from techniques to reproducibly generate cracks, it is shown that an in situ capacitance measurement is a convenient method to detect these failures unambiguously. Finite element simulations support the experimental results. A reliability estimate for capacitor integrity under given loading conditions is given.
dc.publisherThe American Society of Mechanical Engineers (ASME)
dc.titleNondestructive Failure Analysis and Simulation of Encapsulated 0402 Multilayer Ceramic Chip Capacitors Under Thermal and Mechanical Loading
dc.typeJournal Paper
dc.journal.volume131
dc.journal.issue1
dc.journal.titleJournal of Electronic Packaging
dc.identifier.doi10.1115/1.3078187
dc.journal.fristpage11012
dc.identifier.eissn1043-7398
dc.keywordsCeramics
dc.keywordsCapacitance
dc.keywordsSimulation
dc.keywordsFracture (Materials)
dc.keywordsFailure
dc.keywordsFailure analysis
dc.keywordsMetals
dc.keywordsTemperature
dc.keywordsReliability
dc.keywordsStress AND Shear (Mechanics)
dc.treeJournal of Electronic Packaging:;2009:;volume( 131 ):;issue: 001
dc.contenttypeFulltext


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