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contributor authorMoneer Bhih
contributor authorTarek Hegazy
date accessioned2022-01-30T19:48:20Z
date available2022-01-30T19:48:20Z
date issued2020
identifier other%28ASCE%29LA.1943-4170.0000378.pdf
identifier urihttp://yetl.yabesh.ir/yetl1/handle/yetl/4266011
description abstractBut-for delay analysis is a popular technique used in practice and accepted by arbitration boards and courts. However, misconceptions are common when the analysis results are interpreted from different parties’ viewpoints. In addition, the adoption of either the literal or functional views on concurrent delays affects the results. This paper thus clarifies the misleading interpretations of but-for results and introduces improvements and an explicit implementation procedure that matches the delay analysis requirements of professional bodies such as the Association for the Advancement of Cost Engineering International (AACEI). To more accurately perform but-for analysis considering all parties’ viewpoints, the paper uses Venn representation and suggests a simplified procedure to check for true concurrency. A case study was used to show a detailed procedure for applying but-for with multiple analysis windows as a more accurate approach to assess concurrent delays and to consider baseline updates. The applicability of the proposed improvements was then confirmed using a second practical case study. The paper is expected to remove the existing but-for misconception and provide a procedure for more accurate and repeatable delay analysis considering concurrent delays.
publisherASCE
titleImproving Concurrency Assessment and Resolving Misconceptions about But-For Delay Analysis Technique
typeJournal Paper
journal volume12
journal issue2
journal titleJournal of Legal Affairs and Dispute Resolution in Engineering and Construction
identifier doi10.1061/(ASCE)LA.1943-4170.0000378
page04520007
treeJournal of Legal Affairs and Dispute Resolution in Engineering and Construction:;2020:;Volume ( 012 ):;issue: 002
contenttypeFulltext


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