Show simple item record

contributor authorBoris Mirman
date accessioned2017-05-09T00:02:10Z
date available2017-05-09T00:02:10Z
date copyrightSeptember, 2000
date issued2000
identifier issn1528-9044
identifier otherJEPAE4-26184#279_1.pdf
identifier urihttp://yetl.yabesh.ir/yetl/handle/yetl/123532
description abstractHigh impact of peeling stresses on solder joint reliability, and how to account for these stresses in failure criteria, are discussed. [S1043-7398(00)00803-3]
publisherThe American Society of Mechanical Engineers (ASME)
titleLead-On-Chip Versus Chip-On-Lead Packages and Solder Failure Criteria
typeJournal Paper
journal volume122
journal issue3
journal titleJournal of Electronic Packaging
identifier doi10.1115/1.1286105
journal fristpage279
journal lastpage280
identifier eissn1043-7398
keywordsSolders
keywordsStress
keywordsFailure
keywordsReliability AND Solder joints
treeJournal of Electronic Packaging:;2000:;volume( 122 ):;issue: 003
contenttypeFulltext


Files in this item

Thumbnail

This item appears in the following Collection(s)

Show simple item record