| contributor author | Boris Mirman | |
| date accessioned | 2017-05-09T00:02:10Z | |
| date available | 2017-05-09T00:02:10Z | |
| date copyright | September, 2000 | |
| date issued | 2000 | |
| identifier issn | 1528-9044 | |
| identifier other | JEPAE4-26184#279_1.pdf | |
| identifier uri | http://yetl.yabesh.ir/yetl/handle/yetl/123532 | |
| description abstract | High impact of peeling stresses on solder joint reliability, and how to account for these stresses in failure criteria, are discussed. [S1043-7398(00)00803-3] | |
| publisher | The American Society of Mechanical Engineers (ASME) | |
| title | Lead-On-Chip Versus Chip-On-Lead Packages and Solder Failure Criteria | |
| type | Journal Paper | |
| journal volume | 122 | |
| journal issue | 3 | |
| journal title | Journal of Electronic Packaging | |
| identifier doi | 10.1115/1.1286105 | |
| journal fristpage | 279 | |
| journal lastpage | 280 | |
| identifier eissn | 1043-7398 | |
| keywords | Solders | |
| keywords | Stress | |
| keywords | Failure | |
| keywords | Reliability AND Solder joints | |
| tree | Journal of Electronic Packaging:;2000:;volume( 122 ):;issue: 003 | |
| contenttype | Fulltext | |