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contributor authorS. Rzepka
contributor authorM. A. Korhonen
contributor authorE. Meusel
contributor authorC.-Y. Li
date accessioned2017-05-08T23:56:13Z
date available2017-05-08T23:56:13Z
date copyrightDecember, 1998
date issued1998
identifier issn1528-9044
identifier otherJEPAE4-26169#342_1.pdf
identifier urihttp://yetl.yabesh.ir/yetl/handle/yetl/120230
description abstractThe stresses occurring in the solder joints during thermal loads have been studied by finite element analysis. Besides the cases of no underfill and perfect adhesion, underfill delaminations at the interfaces to the solder, to the chip, and to the substrate surfaces, respectively, have been considered. The simulation results indicate that rapid failing of the flip-chip modules due to delamination can be prevented effectively by using an underfill that has a high Young’s modulus at room temperature (even 20 GPa are not too high) and a CTE slightly lower than solder. Since the ultimate failure is always caused by growing of a major crack, the damage integral concept is valid for lifetime estimations even in the case of FC modules with underfill.
publisherThe American Society of Mechanical Engineers (ASME)
titleThe Effect of Underfill and Underfill Delamination on the Thermal Stress in Flip-Chip Solder Joints
typeJournal Paper
journal volume120
journal issue4
journal titleJournal of Electronic Packaging
identifier doi10.1115/1.2792644
journal fristpage342
journal lastpage348
identifier eissn1043-7398
keywordsThermal stresses
keywordsSolder joints
keywordsDelamination
keywordsFlip-chip
keywordsSolders
keywordsStress
keywordsElasticity
keywordsTemperature
keywordsFracture (Materials)
keywordsFinite element analysis
keywordsApproximation
keywordsFailure AND Simulation results
treeJournal of Electronic Packaging:;1998:;volume( 120 ):;issue: 004
contenttypeFulltext


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